Kalendarium
Thesis defence: Analog-to-Digital Converters for High-Speed Applications
Disputation
From:
2024-06-14 09:15
to
13:00
Place: E-house, E:1406.
Contact: hamid [dot] karrari [at] eit [dot] lth [dot] se
Hamid Karrari defends his thesis: Analog-to-Digital Converters for High-Speed Applications
This thesis delves into the multifaceted challenges of designing analog-to-digital converters (ADCs) tailored for high-speed and medium accuracy applications, particularly in deeply scaled-down complementary metal-oxide semiconductor (CMOS) technologies across five comprehensive chapters within its Introduction. Conclusively, the Introduction part briefs the challenges, achievements, and contributions of the thesis, offering insights and recommendations for future research trajectories in the realm of high-speed ADC design. Moreover, the thesis ventures into five original papers in its second part, discussing multiple designs and leveraging techniques such as time interleaving, employment of hybrid ADCs, and asynchronous clocking to attain superior performance metrics encompassing speed, resolution, and power efficiency. Notable contributions include techniques to enhance BST-SW linearity, the design of a high-speed comparator, synchronous versus asynchronous SAR ADC comparison and implementation of a 4-channel TI pipelined-SAR ADC in a 22-nm FDSOI CMOS process, capable of operating at a sampling rate of 1.4 GS/s.
Link to thesis i LU Research Portal:
Zoom link. Zoom ID: 67608675506.