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Electrical and Information Technology

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Saketh designs compute-in-memory

2023-08-24

 

Saketh Ram Mamidala defends his thisis Friday, September 1st in lecture hall E:B, 09:15.
Zoom link: https://lu-se.zoom.us/s/64202896244   Zoom ID: 64202896244.

External link to thesis:

https://portal.research.lu.se/en/publications/vertical-iii-v-nanowires-for-in-memory-computing

Describe your research in a popular science way.

Answers to complex engineering problems are often found by simply turning to nature. The blade shape of a wind turbine was inspired by the ridges on the pectoral fins of a humpback whale and automobile windshields were inspired by the design of a spider’s web to prevent shattering. When it comes to computing, a natural comparison drawn is with the biological brain. We know that computers for a given problem, are far superior in terms of calculation speed and precision, but are they energy-efficient? With the rise of artificial intelligence (AI) and data-hungry machine learning, the energy demand on the present computing systems is only increasing.
 The fundamental units that build a computer are the processor and memory. The traditional computers we use today are based on the von Neumann architecture, where the memory and processor units are separate. The physical separation poses a severe constraint on further development as the data needs to be constantly shuttled between the two units and is termed the von Neumann bottleneck. The biological brain, on the other hand, can process and store information, making it extremely energy-efficient. In this work, we propose a solution for achieving compute-in-memory in a 3D geometry using vertical nanowires.

What made you want to pursue a PhD?

Honestly, I went with the flow after my master’s. But now, as I reach the end of my Ph.D, I can safely say that if I could go back in time, I'd choose to do a Ph.D again.

Do you believe some results from your research will be applied in practice eventually? And if so, how / how?

The industry has expressed concerns about achieving scalability in both geometry and supply voltage for integrating 1-transistor-1-resistor (1T1R) devices in crossbar arrays. In this thesis, we present a potential solution that addresses these concerns. It is difficult to predict if it will be used in practice, but it is satisfying enough to know that our work is timely and may be used in some form in the future.

What are your plans?

I'll be continuing my research journey as a postdoctoral researcher at IBM-Research in Zurich, Switzerland. My primary focus will be on delving deeper into the field of neuromorphic computing. I look forward to applying the knowledge I've gained here at Lund and learning new things along the way!